|
| FRIDAY, June 11, 2004, 09:00 AM - 05:00 PM | Room: 6C
|
| FRIDAY TUTORIAL
|
| #5 - Silicon Debug: What Do You Do When Your ASIC Does Not Work as Fast as Expected?
|
| Organizer(s): Doug Josephson
|
| This tutorial is an overview of the complex process of silicon debug. Silicon debug is the process of ensuring that an integrated circuit is both functionally correct in its operation, and also robustly operates across its entire window of operation (frequency, voltage, processing and temperature). It entails exercising the device on automated test equipment as well as in the system it is intended to operate in, while looking for failure to operate correctly. It is a key step in the path to ensuring high yield, and hence high revenue for your silicon. Debugging entails both designer intervention and tool support, as well as proper testing equipment use.
An overview and the basic approaches of silicon debug are covered initially. Design for debug (DfD) and a review of hardware hooks to facilitate debug are presented for both microprocessors as well as core-based system chips. DfD automation is discussed and illustrated using examples. This is followed by the methods and processes used to perform silicon debug using such features as well as external debug tools. A review of CMOS circuit types is presented and the failure modes of circuits are discussed. With this foundation, the processes of logical and electrical debug are described in detail, and several case studies from actual silicon debug of microprocessors and SOC chips are presented. In conclusion, future challenges for debug are described.
|
| Speaker(s): | Bob Gottlieb - Intel Corp., Santa Clara, CA
Jason Stinson - Intel Corp., Santa Clara, CA
Bill Huott - IBM Corp., New York, NY
Bart Vermeulen - Philips Semiconductor, Eindhoven, The Netherlands
|
|